IBM Unveils World's First Sub-1nm Chip With 100 Billion 3D-Stacked Transistors

IBM announced what it calls the world’s first sub-1 nanometer chip, using a 0.7 nm “nanostack” architecture that vertically stacks transistors in 3D. The company says the design places nearly 100 billion transistors on a chip roughly fingernail-sized, delivering up to 50% higher performance or 70% greater energy efficiency versus IBM’s 2 nm node. IBM frames the breakthrough as a way to address the power demands of AI and to extend the viability of Moore’s Law, while noting the work is currently a research achievement. The company aims to reach production within five years. IBM also claims the approach enables 40% scaling in SRAM, positioning it as a major improvement for on-chip memory used by AI workloads. The article contrasts IBM’s transistor-level 3D sequential integration with other “3D stacked” solutions from AMD, Intel, and Nvidia that stack packages rather than transistors.